RTL Design
Clocks, registers, and state machines.
Logic shaped before it becomes silicon.
Ethan Tiong · Portfolio · RTL for ASIC & FPGA
ORIGIN
Where the tales begin.
Follow the spirit through the dark.
01Awakening
First things first,
a little about me.
Hi! My name is Ethan Tiong. I was born in Canada on a snowy winter afternoon, and if it was not already obvious, my favourite animal is the fox. I've always held an affinity towards the charm, intelligence, and playfulness they are known for. Quiet when they need to be, quick when it matters, and just a little mysterious.
I study Electrical Engineering at the University of Waterloo. I am most drawn to RTL design: latency, throughput, interfaces, timing, and the logic that decides how a system moves. I like the space between hardware and software too, bridging the gap between processing systems and programmable logic. Every tail points deeper, closer to silicon.
- Based
- Greater Toronto · open to relocate
- Speciality
- RTL · ASIC & FPGA
- Status
- Open · Winter 2027 co-op
02The Hunt
The skills I bring,
and how I use them.
Verification
Self-checking testbenches and assertions.
Nothing ships on faith.
Interfaces
AXI4-Lite, UART, CSRs.
Communication makes the world go round.
Design Flow
Vivado, Vitis, TCL, CI/CD.
From source to bitstream, repeatable and clean.
Adaptability
Fast learner, clear teammate, steady under ambiguity.
Quick on the trail, calm in the dark.
Whatever new experiences await me today,
I'll meet them head-on.
03The Leap
What I've built,
and how it works.
Focus or Fry
A fully parameterized UART in Verilog — 16× oversampling, phase-accurate sampling, FIFO buffering and flow control, verified in SystemVerilog.
Verilog · FSMs · FIFO · SystemVerilog
GitHubThe Encoder
A quadrature encoder block in VHDL — FSM control and measurement logic, exposing position, speed and error status through a CSR-mapped AXI4-Lite window.
VHDL · FSM · AXI4-Lite · SystemVerilog TB
Calming Teddy Bear
An Arduino bear that sensed racing hearts and answered with a lullaby and a warm tummy — easing anxiety by up to 52% at a care centre and a dental clinic.
Arduino · Heart-rate sensing · C++
Documentation04The Den
What I get up to,
off the clock.
Some nights are tucked safely in the den. Cooking something warm, playing with friends, or getting lost in a story. Quiet things, but still part of the trail.
- Games with friendsMinecraft, Valorant, and League. Fun with friends, painfully boring alone.
- TennisYears of competing left their mark. Pickleball just happened to speak the same language.
- CookingI know my way around Western comfort food. Lately, the winds have shifted toward Chinese, Korean, and other Asian dishes.
05Transformation
Every tail
has a tale.
- 2024Waterloo — Electrical Engineering begins
- 2025Embedded Design @ General Dynamics
- 2025RTL Design @ General Dynamics
- 2026Low-Latency FPGA Designer @ ArchES Computing
- 2029Graduate Waterloo Electrical Engineering
06The Snowfield